Resource Allocation and Delay Constraints in ATM networks

This article first reviews the architecture of a typical ATM switch and considers the problem of handling both continuous bit oriented and bursty traffic with low loss and delay requirements. We examine six different approaches to handling mixed traffic in an ATM switch, and compare their performance by means of simulation. A switch architecture which distinguishes between three traffic types with a shared buffer turns out to have the best performance, where by performance we mean the ability of the switch to provide the quality of service (loss and delay ) desired by each application at minimum expense.